Three-Address Code (3AC) , where every instruction has at most one operator and three operands (e.g., t1 = a + b ).

The final leap into the specific instruction set of a CPU (x86, ARM, etc.).

LLVM’s mature, highly-optimized automatically handles the optimization and generation of machine code for x86, ARM, RISC-V, and dozens of other chips. 5. Summary: Key Concepts to Remember Compiler Phase Primary Core Concept Lexical Analysis Source Code Characters Token Stream Regular Expressions & DFA Syntax Analysis Token Stream Abstract Syntax Tree (AST) Context-Free Grammar (CFG) Semantic Analysis Decorated AST Type Checking & Scope Rules Intermediate Code Gen Decorated AST Intermediate Representation (IR) Three-Address Code Code Optimization Optimized IR Data-flow Analysis Code Generation Optimized IR Target Machine Code Register Allocation